Semiconductor chips are widely used for many functions in today's electronic world. These semiconductor chips are produced from wafers in a semiconductor manufacturing process. As the final steps of the semiconductor manufacturing process are occurring, a plurality of final test steps are required in order to prevent defective chips from reaching the user. A probe test is a typical test step of this type. In this probe test, a probe test apparatus is used in that probes are brought into physical contact with all of electrical pads of one chip of a large number of semiconductor chips on the semiconductor wafer. A signal pattern is then applied to each of the semiconductor chips by using the probe test apparatus, and an output from each chip is monitored thereby testing the electrical characteristics of each semiconductor chip. With this probe test apparatus, and in order to test all the chips on the semiconductor wafer, a wafer chuck on which the semiconductor wafer is held must be vertically moved up and down and stepped by a distance corresponding to one chip every time a test on one chip is completed.
As the final steps of the semiconductor manufacturing process is completed, a marking step, and a repair step sometimes is performed in addition to the probe test step. In the marking step, a chip determined as a defective chip by the probe test is marked by using ink or the like. In the repair step, a repairable defective chip is repaired. Furthermore as a final test step, a visual test step may be required in which the semiconductor chips on the semiconductor wafer are magnified and visually observed.
As another final test step of the semiconductor manufacturing process, a burn in test is conducted in addition to the above probe test. In that burn in test, semiconductors chips are driven to a state similar to an actual driven state while temperatures and/or voltages stresses are applied to the semiconductor chips thereby finding semiconductor chips which are subject to infant failures of the semiconductor devices manufactured by using the chips. In these conventional systems, this burn in test is not conducted on the semiconductor chip on the semiconductor wafer but is conducted on each of the semiconductor devices obtained by cutting a semiconductor wafer into chips and packaging them at this point more cost has been invested.
A disadvantage of the probe test is that in fact a probe is required to touch the semiconductor wafer. This physical contact with the semiconductor wafer generates particles and the associated damage.
The particles are mainly a problem if probing is attempted on in-process wafers before passivation, especially after an early step like after polysilicon patterning. Therefore, non-contact voltage stressing at these early steps in wafer processing is very advantages or necessary.